Silicon Labs Highly integrated clock ics for wireless infrastructure applications

Silicon Labs, a leading provider of high-performance timing solutions for Internet infrastructure, has announced the industry's most integrated clock IC for wireless infrastructure applications, including small cell and macro cell. Silicon Labs' new Si5380 clock generator is the industry's first single-chip device capable of replacing low-phase noise integer n-division clocks, voltage controlled crystal oscillators (VCXO), discrete loop filters and voltage regulators. The Si5380 clock IC offers phase noise performance comparable to traditional discrete solutions, while providing significant benefits in package size, cost of material (BOM), power consumption, performance and ease of use.

According to a recent Cisco study, global mobile data traffic is likely to soar nearly tenfold between 2014 and 2019, driven by the widespread deployment of video streaming services and IoT-connected devices. While base station vendors are developing new 4G/LTE equipment to increase network capacity and coverage, it is increasingly difficult for microcell base stations to design, as they are often deployed to outdoor locations with limited space and power consumption in crowded urban environments. Silicon Labs' new Si5380 clock IC is the industry's first single-chip wireless clock IC and is specifically optimized for size, power consumption, integration, and performance, making it ideal for microcell base station applications.

The Si5380 clock IC uses Silicon Labs' latest fourth-generation DSPLL technology to provide a targeted and optimized solution for the next generation of microcell and macro cell base station remote Radio frequency head (RRH) designs. DSPLL technology's innovative dual-loop mixed-signal architecture integrates a high-performance 15GHz analog volte-controlled oscillator in a digital phase-locked loop (PLL) architecture, eliminating the discrete loop filters and low-voltage differential output (LDO) regulators typically required. This allows the clock solution to provide the best combination of ultra-low phase noise clock synthesis and best-in-class PLL integration.

Compared to competing VCXO clock IC solutions, the Si5380 clock IC can reduce printed circuit board (PCB) footprint by 66% and reduce power consumption by 30%. Today's microcell base stations often have limited power budgets and are typically powered by power over Ethernet (PoE) technology, so energy-efficient timing devices are particularly important. By integrating all PLL and power regulation circuits in the DSPLL, the Si5380 chip provides extremely high board-level noise suppression, power supply noise suppression, and consistent, repeatable phase noise performance over the operating temperature range.

VCXO based clock solutions often lead to stray performance degradation in vibration environments, while the Si5380 chip integrates DSPLL technology to provide excellent stray response in any system environment. In addition, the Si5380 clock chip guarantees low phase noise when locked to a high-jitter input clock, ensuring that data converter performance is not degraded by external influences. The Si5380 is capable of generating 4G/LTE frequencies up to 1.47456GHz and provides 12 independent configurable clock outputs to provide timing services for JESD204B-compliant data converters, FPgas and other logic devices.

James Wilson, Director of timing product Marketing at Silicon Labs, said: "The Si5380 clock is the industry's most integrated timing solution, meeting the needs of micro and macro cell base stations for compact PCB packaging, low power consumption, reliability and carrier-level phase noise performance in a variety of environmental conditions. Silicon Labs' highly integrated DSPLL clock architecture, combined with easy-to-use ClockBuilder Pro software, greatly simplifies the design challenges of clock synthesis and jitter attenuation required for today's heterogeneous wireless networks."

Simplify clock tree design with ClockBuilder Pro

To simplify clock tree design for wireless base stations, Silicon Labs' ClockBuilder Pro software helps designers generate programmable Si5380 clock configurations in five minutes, minimizing software development costs. Instead of waiting months for a custom clock chip, designers can simply upload their custom configurations to Silicon Labs through ClockBuilder Pro, and factory-pre-programmed Si5380 clock samples can be shipped within two weeks. Thanks to the industry's shortest custom sample lead times, customers can greatly accelerate the entire product development process.